ASIC Design Engineer

Role: ASIC Design Engineer

Build and deliver advanced ASICs for next-generation AI/HPC networking solutions.

Key Responsibilities

• Implement advanced Ethernet protocols for next-generation Ethernet ASICs.
• Write micro-architecture specifications.
• Pre-silicon:
  • Define timing constraints for RTL blocks and collaborate with Physical Design engineers for timing optimization.
  • Work with verification engineers to create block/system-level test plans and ensure adequate design coverage.
• Post-silicon:
  • Collaborate with hardware/firmware/software engineers to resolve ASIC issues.

Minimum Qualifications

• B.S. or M.S. in Computer Engineering or Electrical Engineering.
• 3+ years of post-college experience in digital design.
• Proficiency in Verilog and SystemVerilog.
• Experience with timing closure and familiarity with modern physical design methodologies.
• Strong system-level debug skills and ability to determine root cause of technical issues.
• Strong verbal and written communication skills.

Preferred Qualifications

• Experience with Ethernet architecture and networking protocols.
• Familiarity with designing Ethernet protocols relevant to adapters and switches.
• Experience with multiple clock designs and asynchronous interfaces.

Location / Work Model

• Based in/remote from Costa Rica via an EOR (Employer of Record) (role may be remote from Costa Rica).